Tilera, Santa Clara, Calif. ASIC fabless semiconductor startup, has raised around $20 million in a second round of funding, according to PE Week.
Columbia Capital led the deal, and was joined by return backers Bessemer Venture Partners and Walden International, PE Week said. The company is run by Bessemer operating partner Devesh Garg.
This follows after the company reportedly raised a first round less than a month ago. We’re not sure if we’ve gotten the rounds mixed up, because that’s a very short period of time, and our assumption is that these were part of the same round. Will clarify when/if we get more data from the secretive company.
(Originally posted 2/16)
2 Comments
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Mark Wendman said:
From EEtimes quote of founder MIT Professor Anant Agarwal, I’d guess they are doing something in the multicore CPU space, possibly somehow related to FPGAs from the job posting at their website (FPGAs likely merely for their prototypes?)
From EEtimes
http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=183702690“And these systems may grow very large. The number of cores will double every 18 months, with 256-core systems commonplace by 2011, predicted Anant Agarwal, professor of engineering and computer science at the Massachusetts Institute of Technology and founder of startup Tilera Corp.”
I could not find patents by Prof. Agarwal that seem relevant to Multicores or FPGAs.
Multicores might be an interesting investment / business if done carefully and with some code compatability in the target hardware.
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Mark Wendman said:
While they might say they are being secretive, (granted the website is pretty spare) Prof. Agarwal seems to have given a nice talk at this conference http://www.ele.uri.edu/barc2006/
The 4th annual Boston area {computer) ARChitecture meetingHere is a link to Agarwal’s powerpoint given at the conference describing the likely strategies for the firm
http://www.ele.uri.edu/barc2006/talks/skp/skp-1-talk-barc2006-AgarwalA.pdf
My guess if it does not explicitly describe the intended products, it might give strong hints as to what he is doing…in multicore designs…
This public talk might be partly to recruit Boston area students / professionals to his firm? but not to keep it stealth?
Multicores are finally catching up to the late 70’s / mid 80s work of CMU’s HT Kung now at Harvard (now doing wireless, but then specializing in pathfinding research in systolic pipelined arrays)
When I was later in 84 at Intel and Cray in 86, I relished the thought of either firm doing massive multicore architectures, but Intel was disinterested, despite later actually building Kungs designs for the government and, and Seymour Cray was not even thinking of massively parallel beyond his favored vector SIMD architecture.
interesting how history eventually catches up…
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7:13 am
VentureBeat » Tilera, with new 64-core chip for networking, has $40M in backing said:
[...] Mercury News story is here. A CNET story is here. Our past coverage of the company is here. Tagged co:Taiwan Semiconductor Manufacturing Co., co:Tilera, deal, inv:Bessemer Partners, [...]