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Intel unveils low-power Silvermont chip design for ‘teraflops to milliwatts’

Intel announced its low-power Silvermont microprocessor architecture today, revealing the power-efficient design that will be the foundation of a new generation of PCs and mobile devices.

Silvermont delivers a three-fold performance improvement over previous generations at the same power levels, the company said.

The technology is a blueprint for future chip designs that will serve as the brains of devices ranging from smartphones to data center servers. Devices made with the Silvermont architecture will use the 22-nanometer Tri-Gate SoC manufacturing process. Silvermont will be the heart of a bunch of chips coming from Intel starting during the holiday season in 2013.

“Silvermont is a leap forward and an entirely new technology foundation for the future that will address a broad range of products and market segments,” said Dadi Perlmutter (pictured), executive vice president and chief product officer, in a press briefing at Intel’s headquarters in Santa Clara, Calif. “This is one of those years when Intel is coming out with one of the biggest innovations in its product lines.”

Perlmutter said Intel’s mission is to create chips from “teraflops to milliwatts,” meaning from supercomputing performance levels to the most power-efficient devices.

Early samples of new chips, code-named Bay Trail and Avoton, are generating good feedback from customers, Perlmutter said. Silvermont can enable three-times peak performance or the same performance at five times lower power over the current generation of Intel Atom processors. Intel said that some of the dual-core chips based on Silvermont will outperform quad-core chips from rivals.

With Silvermont, the company has completely redesigned the  processor, with a new “out-of-order execution engine” that enables top performance when processing one thread, or program code. Within this part of the design, Intel can fuse three instructions together and process them quickly as if they were a single instruction. In such calculations, the chip fuses instructions that present some data, perform a calculation on them, and then return the result to memory — in a more efficient manner than in the past.

The design can be scaled up to eight cores. Intel has added new instructions for support of better virtualization, power management, and security management. With Silvermont, a chip can enter sleep mode or wake up more quickly than it the past. Also, the range of performance at different power levels will vary more widely.

Intel will use Silvermont in a variety of markets. Different chips that will use Silvermont include Bay Trail, Merrifield, Avoton, Rangeley, and an unnamed chip.

Bay Trail, a new Atom-branded chip, will debut for the 2013 holidays in tablets that can more than double the performance of current Intel-based tablets. It can also be used in entry-level laptops and desktops in new forms.

Intel’s code-named Merrifield will focus on increased performance, better battery life, and support for context aware and personal services.

And Intel’s Avoton will be used as an Atom chip in the data center, for use in micro servers and other low-power devices. Rangeley is aimed at networking devices such as routers, switches, and security appliances coming in the second half of the year.

Starting in June, Intel will be shipping its Haswell architecture, with a series of chips based on that architecture. Silvermont-based devices will come after that. Intel’s low-power chips will compete against the ARM architecture, which is used by many different chip makers.

“We are on the path of breaking the myth that ARM can do things that Intel cannot,” Perlmutter said.

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