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Field-programmable gate array (FPGA) — integrated circuits designed to be configured post-manufacture — is a versatile tech with applications in a swath of domains including (but not limited to) high-performance computing, consumer electronics, bioinformatics, medicine, security, and even aerospace and defense. Analysts Statistics MRC pegged the overall industry at $63.05 billion in 2017 and expects it to grow to $117.97 billion by 2026, buoyed by increased demand for optimization in big data analytics and edge computing.

It’s with these metrics top of mind, no doubt, that Intel this week announced a new FPGA product family due out in Q3 of this year: Intel Agilex. It’s a collection of embedded chipsets that the Santa Clara company says address “data-centric” challenges in enterprise networks and datacenters.

As Daniel McNamara, senior VP and general manager of Intel’s Programmable Solutions Group, explained in a conference call with reporters, Agilex products — which are built on Intel’s 10-nanometer (nm) process technology — feature a customizable heterogeneous 3D system-in-package (SiP) that comprises analog, memory, computing, and custom I/O components including DDR5, HBM, and an Intel Optane DC. They’re all fully supported by Intel’s One API, a suite of developer tools for mapping compute engines to a range of processors, graphics chips, field-programmable gate arrays, and other accelerators, and offer a migration path to both structured application-specific integrated circuits (ASICs) and standard-cell ASICs.

“We’re basing [Agilex] on or what we call EMIB — Embedded Multi-die Interconnect Bridge — which builds the interconnect into the substrate,” McNamara said. “[T]his allows us to put a base FPGA die, and then put any different [tile] all in the same package integrated into one device.”

Spotlight features are compatible with Intel’s Compute Express Link (the cache and memory coherent interconnect to future Intel Xeon Scalable processors), and support hardened BFLOAT16 (a floating-point format occupying 16 bits in memory) and up to 40 teraflops of half-precision (FP16) digital signal processor performance. Agilex FPGAs are able to achieve 40 percent higher performance or 40 percent lower total power compared with Intel’s 14nm Stratix 10 FPGAs, thanks in part to their second-generation HyperFlex architecture, and they support transceiver data rates of up to 112Gbps and speedy interconnect peripherals via PCI Express Gen 5.

“[T]his is a big opportunity for FPGA to accelerate some of the packet processing applications in the cloud, where [they’re being] managed and [organized],” McNamara said. “The race to solve data-centric problems requires agile and flexible solutions which can move, store and process data efficiently. Agilex FPGAs deliver customized connectivity and acceleration while delivering much-needed improvements in performance and power for diverse workloads.”


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