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Ayar Labs is leveraging novel silicon processing techniques to develop high-speed, high-density, low-power optical-based interconnect “chiplets” to replace traditional I/O. Today, the company raised $35 million for product development and commercialization of its in-package optical interconnect solution.
Making transistors — the tiny on-off switches inside silicon chips — smaller and smaller has enabled the computer revolution and the $1 trillion-plus electronics industry. But the copper interconnections between transistors on electronics are a major impediment to progress. The resistive-capacitive delay (RC delay) within interconnects has prevented transistors from becoming faster as they shrink, as is normally the case. Moreover, copper remains unreliable at small dimensions, even with insulators made of shielding materials.
Ayar, which was cofounded in 2015 by Alex Wright-Gladstein, Chen Sun, and Mark Wade, aims to develop products that move data from chip to chip using light instead of electricity transmitted through copper wires. Ayar claims its solution — which is based on a decade of research and collaboration between MIT; the University of California, Berkeley; and Colorado University Boulder — overcomes the power and performance scaling challenges of semiconductors, as well as the interconnect bandwidth bottleneck between those devices.
Photonic circuits like Ayar’s, which are also being investigated by startups like Lightelligence, LightOn, and Lightmatter, require only a limited amount of energy because light produces far less heat than electricity. They also benefit from reduced latency and are less susceptible to changes in temperature, electromagnetic fields, and noise.
Ayar’s chiplets and multi-wavelength lasers are designed to replace electrical-based I/O. The chiplets can drive a 1000 times improvement in interconnect bandwidth density at 10 times lower power, the company says, enabling new system architectures for AI, cloud, high-performance computing, 5G, and lidar.
For instance, Ayar’s TeraPhy chiplet is theoretically capable of tens of terabytes per second of bandwidth, thanks to a modular multiport design with ports carrying eight channels of light. TeraPhy features a wide, high-bandwidth electrical interface to connect to partner silicon. It also has a light supply called SuperNova, a photonic integrated circuit that generates eight or 16 wavelengths of light, multiplexes them, splits the power, and amplifies it to eight or 16 output ports. Ayar says SuperNova can supply light for 256 channels of data, which translates to 8.192 terabytes per second.
“These smart optical I/O chiplets enable system-on-chip companies and system-integrators to focus on their core function integration and process scaling while offloading the I/O tasks to low-power, high-throughput and reach optical I/Os,” Ayar says. “This enables logically connected and physically federated systems.”
The company’s series B round was co-led by Downing Ventures and BlueSky Capital, alongside new investors Applied Ventures, Castor Ventures, Downing Ventures, and SGInnovate. Existing investors, including BlueSky Capital, Founders Fund, GlobalFoundries, Intel Capital, Lockheed Martin Ventures, and Playground Global, also participated. The round brings Santa Clara, California-based Ayar’s total raised to over $60 million.
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