You've heard of chips. But how about chiplets? Intel is providing a royalty-free license for an advanced data transfer technology for a new government-sponsored electronics research program.
Intel made the announcement at the Defense Advanced Research Project Agency (DARPA) 2018 Electronic Resurgence Initiative (ERI) Summit to discuss innovative new approaches to microsystems materials, designs, and architectures. And yes, that means these blocks of semiconductor component designs known as chiplets.
At the conference, DARPA announced that its Common Heterogeneous Integration and Intellectual Property Reuse Strategies (CHIPS) program has established a common open standard interface to build upon.
CHIPS combines discrete modular, reusable intellectual property (IP) blocks -- or chiplets -- into flexible, cost-effective, high-performance computing solutions. This heterogeneous design approach requires a set of standard methodologies, tools, and interfaces that are widely adopted by the industry.
To that end, Intel is said it will provide a royalty-free license for the Advanced Interface Bus (AIB) to CHIPS participants and others. Intel's Advanced Interface Bus is a die-to-die level standard that enables a modular approach to system design with a library of chiplets. The AIB standard interface targets the low-energy, high-bandwidth requirements established for chiplet-to-chiplet communications.
“As the amount and types of data explode, we want to rapidly integrate existing and novel architectures to create optimized products for specialized tasks and demanding, data-intensive workloads,” said Intel chief technology officer Michael Mayberry, in a statement. “By providing the AIB standard for DARPA’s Chips program, Intel is making it easier for DARPA and others in the industry to design heterogeneous products that are more efficient and cut down on time to market.”
Intel is already applying this mixing and matching strategy, delivering heterogeneous products like the 8th Gen Intel Core processor with Radeon graphics and Intel Stratix 10.
Meanwhile, Nvidia said its team of researchers -- allied with researchers from Massachusetts Institute of Technology, University of Illinois at Urbana-Champaign and University of California, Davis -- was awarded a $23 million, four-year contract under the software-defined hardware part of DARPA's initiative for making near-custom chips without sacrificing programmability. Nvidia will also collaborate with Cadence Design Systems to apply machine learning to design automation for chips.
“The Electronics Resurgence Initiative jump-starts innovations to address the challenges stemming from the end of Moore’s law,” said Steve Keckler, vice president of architecture research at Nvidia, in a statement. “The technologies that are developed through the ERI program will have a substantial impact on the future of electronic computing devices and Nvidia's future products.”
In a keynote presentation at the ERI Summit, Mayberry discussed how heterogeneous integration, in addition to continued factory scaling and other approaches, can help extend the economic benefits of Moore’s law while continuing to make computing faster, more functional, and more power efficient.
By contributing the AIB standard to DARPA’s CHIPS program and beyond, Intel said it is taking a leadership role to support the industry shift to heterogeneous integration.
Building custom chips known as application-specific integrated circuits (ASICs) won't help many applications from either the economic or time-to-market perspective. Rapidly emerging workloads for artificial intelligence, communications, and emerging protocols require integration of a variety of functions to realize and meet performance requirements.
Breakthroughs in packaging technologies make it possible to combine functional chiplets built on optimized process technologies. AIB solves a key interoperability bottleneck by providing a standard interface, enabling complex systems in a single package. This common interface will make it more efficient and cost-effective to create pre-validated chiplets for heterogeneous products, Intel said.